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Archive for the 'Hardware' Category

Dec 01 2008

Sempron versus Athlon XP

Published by ra7d_si2gar under Hardware, computer Edit This

This naming scheme used by AMD is really confusing. As you can see there are three Athlon XP 2600+ models with completely different technical specs, even though they use the same name.

Processor Internal Clock External Clock L2 Memory Cache Socket
Sempron 2200+ 1.50 GHz 333 MHz 256 KB 462
Sempron 2300+ 1.58 GHz 333 MHz 256 KB 462
Sempron 2400+ 1.67 GHz 333 MHz 256 KB 462
Sempron 2500+ 1.70 GHz 333 MHz 256 KB 462
Sempron 2600+ 183 GHz 333 MHz 256 KB 462
Sempron 2800+ 2 GHz 333 MHz 256 KB 462
Sempron 3000+ 2 GHz 333 MHz 512 KB 462
Processor Internal Clock HyperTransport L2 Memory Cache Socket
Sempron 2500+ 1.40 GHz 800 MHz 128 KB 754
Sempron 2600+ 1.60 GHz 800 MHz 128 KB 754
Sempron 2800+ 1.60 GHz 800 MHz 256 KB 754
Sempron 3000+ 1.80GHz 800 MHz 128 KB 754
Sempron 3100+ 1.80 GHz 800 MHz 256 KB 754
Sempron 3300+ 2 GHz 800 MHz 256 KB 754
Sempron 3400+ 2 GHz 800 MHz 256 KB 754

 To learn more about the HyperTransport bus, read our article about it.

Processor Internal Clock External Clock L2 Memory Cache Core
Athlon XP 1500+ 1.33 GHz 266 MHz 256 KB Palomino
Athlon XP 1600+ 1.40 GHz 266 MHz 256 KB Palomino or T-Bred
Athlon XP 1700+ 1.46 GHz 266 MHz 256 KB Palomino or T-Bred
Athlon XP 1800+ 1.53 GHz 266 MHz 256 KB Palomino or T-Bred
Athlon XP 1900+ 1.60 GHz 266 MHz 256 KB Palomino or T-Bred
Athlon XP 2000+ 1.66 GHz 266 MHz 256 KB Palomino or T-Bred
Athlon XP 2100+ 1.73 GHz 266 MHz 256 KB Palomino or T-Bred
Athlon XP 2200+ 1.80 GHz 266 MHz 256 KB T-Bred
Athlon XP 2400+ 2 GHz 266 MHz 256 KB T-Bred
Athlon XP 2500+ 1.83 GHz 333 MHz 512 KB Barton
Athlon XP 2600+ 2.13 GHz 266 MHz 256 KB T-Bred
Athlon XP 2600+ 333 2.08 GHz 333 MHz 256 KB T-Bred
Athlon XP 2600+ 1.90 GHz 333 MHz 512 KB Barton
Athlon XP 2700+ 2.16 GHz 333 MHz 256 KB T-Bred
Athlon XP 2800+ 2.25 GHz 333 MHz 256 KB T-Bred
Athlon XP 2800+ 2.08 GHz 333 MHz 512 KB Barton
Athlon XP 3000+ 2.16 GHz 333 MHz 512 KB Barton
Athlon XP 3000+ 400 2.10 GHz 400 MHz 512 KB Barton
Athlon XP 3200+ 2.20 GHz 400 MHz 512 KB Barton
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Dec 01 2008

Core Duo

Published by ra7d_si2gar under Hardware, computer, info Edit This

Core Duo (formerly known by its codename, Yonah) was the first dual-core Intel CPU targeted to the mobile market, i.e. inside it there are two complete CPUs. Curiously it was also the first Intel processor to be adopted by Apple Computer. In this tutorial we will present the main features of Core Duo and Core Solo and tables with all models released to date.

Watch out to not confuse Core Duo with Core 2 Duo. Core Duo is the commercial name for the Pentium M processor with two processing cores and manufactured under 65 nm process. Core 2 Duo on the other hand is the commercial name for the processor codenamed Merom (for laptops) or Conroe (for desktops), using the new Core microarchitecture, which is the same microarchitecture used by Pentium M but with more features added.

Core Duo is, in fact, a Pentium M with two cores and manufactured using 65-nm process (currently Pentium M is manufactured using 90 nm process). For an in-depth understanding of Core Duo, we suggest you to read our tutorials Intel Dual Core Technology and Inside Pentium M Architecture. Our tutorial All Pentium M Models is also a good read if you wish to compare Core Duo to Pentium M. And if you are interested in the internal architecture used by Core Duo, read our Inside Pentium M Architecture tutorial.

Even though it has two CPU cores inside the same package, Core Duo die size is almost the same of Pentium M’s (Dothan die). This means that the cost for manufacturing Core Duo is practically the same of Pentium M, which has just one core. Core Duo has 151.6 million transistors occupying an area of 90.3 mm2 (0.14 sq inch) while Pentium M based on Dothan die has 140 million transistors on an 87.66 mm2 (0.135 sq inch) area. Keep in mind that Core Duo is manufactured under 65-nm process while Pentium M is manufactured under 90 nm one.

Core Duo’s L2 memory cache is of 2 MB shared between its cores (Intel calls this shared L2 implementation “Smart Cache”). On Pentium D 840, for instance, which is a dual-core CPU, its 2 MB L2 memory cache is split between the cores, so each core has access to only 1 MB each. I.e. on Pentium D there are two 1 MB L2 memory caches, one per core. On Core Duo there is only one 2 MB L2 memory cache, which is shared between the two cores. Core 2 Duo, by the way, uses this same architecture that was introduced with Core Duo.

With a shared memory cache, the amount of memory cache that each core uses isn’t fixed. With a 2 MB L2 memory cache one core may be using 1.5 MB and the other 512 KB (0.5 MB) at a given moment, for example. If on a dual-core CPU with separated L2 memory cache one of the cores run out of cache (i.e. its 1 MB is being fully used) it needs to go directly to the slow RAM memory to fetch the required data, slowing down the system performance. On CPUs with shared L2 memory cache, each core can simply resize the amount of L2 memory cache it is using.

Another advantage of shared L2 memory cache is that if one core fetched a data (or a instruction) and stored it on the L2 cache, the other core can use this same piece of information. In dual-core CPUs with separated memory caches the second core would have to grab this data (or instruction) thru the CPU local bus, i.e. “from outside”, using the local bus clock, which is far inferior than the processor internal clock, thus slowing down the system performance.

Core Duo main features are the following:
Dual-core technology
Code-name: Yonah
151.6 million transistors occupying an area of 90.3 mm2 (0.14 sq inch)
32 KB L1 instruction cache and 32 KB data L1 cache
2 MB L2 memory cache shared between the two cores
Socket 478 or 479
65 nm manufacturing process
667 MHz (166 MHz transferring four data per clock cycle) or 533 MHz (133 MHz transferring four data per clock cycle) external bus.
Virtualization Technology
Execute Disable Technology
Enhanced SpeedStep Technology
SSE3 instruction set support

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May 27 2008

What is the purpose of Wi-Fi ad-hoc mode? Why would I use it?

Published by ra7d_si2gar under Hardware, network Edit This

The 802.11 standard defines two modes of operation: Infrastructure mode, where all stations communicate through an access point, and ad-hoc mode, where stations communicate directly without the help of an intermediary. Ad-hoc mode can be useful for temporary peer-to-peer applications, such as when two laptop users want to exchange files over Wi-Fi.

Most businesses discourage use of ad-hoc mode because they prefer to enforce corporate security policy at the access point and gateway or switch connected to the access point. Users that communicate directly over ad-hoc mode essentially bypass those security measures. Ad-hoc mode can even be used as an attack method. For example, a Windows XP PC that previously associated to an access point with a given name (SSID) can be tricked into automatically re-associating in Ad-hoc mode to an attacker’s laptop that advertises that SSID. You avoid this attack by configuring XP (or any other wireless client software) to associate to preferred SSIDs in infrastructure mode only.

On the other hand, several vendors are now using ad-hoc mode as the foundation for building wireless mesh networks. Mesh networks have many applications, including outdoor metropolitan networks and mobile ad-hoc networks (MANETs). To learn more about Ad-hoc mode and its use in mesh networks, visit this NIST resource page. A standard for mesh networks is now under development, designated IEEE 802.11s.

In short, ad-hoc mode has many constructive uses, but unless you have a specific reason for enabling, your safest best today is to disable ad-hoc mode to prevent unwanted or risky associations.

source

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